Optimizing power consumption in embedded DSP designs

posted by   spcwlkr (130)   28 months ago (www.embedded.com)

From article " Fortunately, DSP chip design and manufacturing processes have developed more advanced methods for reducing power consumption in recent years. On-chip power optimization techniques now offer more granular control, more power-saving modes, and more complete information about processor power consumption than ever before. Newer DSP development tools give designers more insight into how their systems consume power and provide techniques for lowering power consumption via on-chip hardware."